In some packages of a semiconductor device such as a NAND flash memory, a plurality of semiconductor chips such as a memory chip and a controller chip are stacked by using an FOD (Film On Device) technology. In the FOD technology, a spacer chip is sometimes used to enable a lower-layer semiconductor chip (a lower-layer chip) to be embedded in an adhesive film even if an upper-layer chip is downscaled.
However, a mirror chip made of the same material as that of a semiconductor substrate and having no patterns is used as the spacer chip and the surface thereof is in a mirror state. Accordingly, the spacer chip is low in adhesion to a mold resin that seals semiconductor chips and there is a risk that detachment occurs at an interface between the spacer chip and the mold resin under a hot and humid environment. This tendency reduces the reliability of the semiconductor device.
Further, it is conceivable that the spacer chip is coated with polyimide to enhance the adhesion to the mold resin. However, use of polyimide increases the manufacturing cost.